TECHNICAL NOTES - DT3

Sigma-delta modulation techniques have been very successfully used in analog-to-digital conversion (ADC) applications over the last two decades. Although sigma-delta concepts existed since the middle of the century, only recent advances in VLSI technologies have made possible the appropriate handling of the bit stream generated by the 1-bit ADC.

Although now almost universally known assigma-delta converters, these devices are still referred to by some manufacturers as delta-sigma converters. This term may be more appropriate in that, in its basic form, the converter consisted of a delta modulator (used for many years in telecommunications), where the input signal is added to the input of the integrator instead of its output (thus eliminating the need for an integrator at the receiver end) [1]. Unfortunately, with time the words delta and sigma seem to have been interchanged arbitrarily. Nowadays, a distinction seems to be made only when the relative position of the summing (sigma) block within the modulator is being emphasized. In addition to the above, other terms often found in the literature are oversampling and noise shaping ADCs.

The last two terms are in fact evocative of the two basic principles involved in the operation of sigma-delta ADCs - oversampling and noise shaping. The former spreads the quantization noise power over a bandwidth equal to the sampling frequency, which is much greater than the signal bandwidth. In the latter, the modulator behaves as a lowpass filter on the signal, and as a highpass filter on the noise, thus "shaping" the quantization noise so that most of the energy will be above the signal bandwidth. A digital lowpass filtering stage then greatly attenuates out-of-band quantization noise, and finally, downsampling brings the sampled signal to the Nyquist rate.

Sigma-delta ADCs are very extensively documented in the literature. The emphasis, however, seems to be either on very theoretical aspects involved in the technology, or on the traditional low-speed, high-resolution applications of these converters.

A very complete review of oversampling methods used for A/D and D/A conversion, as of 1992, is presented in [1]. A more recent paper [2] provides an up-to-date view of the technology, including an examination of its use in the A/D conversion of narrowband bandpass signals, as well as a discussion of several parallel architectures.

Both [1] and [2] include very extensive lists of references, mostly of papers published in technical journals or presented at conferences. Many of the papers concentrate on theoretical aspects of issues such as stability, limit cycles, quantization noise spectra, analysis of nonlinear behaviour, etc.; in most cases these offer little practical information to engineers. On the other hand, a number of papers discuss in detail the structure of new architectures and techniques employed in the development of new devices. The great technical depth in these papers offers the engineer very useful information, rarely available in data sheets or application notes published by manufacturers. However, it is sometimes difficult to differentiate between material that presents ideas and techniques that, although of great technical merit, never find their way into actual (commercially available) devices, and those which do.

Numerous articles in trade magazines have promoted the benefits of these converters. Although the emphasis has been usually on low-speed, high-resolution applications [3-5] and audio [6], recently introduced devices extending into the medium signal bandwidths have also been documented [7].

In this article we concentrate on this latter aspect - commercially available sigma-delta ADCs for speech, audio and medium bandwidth applications. For a number of years now, at RMS INSTRUMENTS we have been incorporating these converters into (general purpose) test & measurement instruments that have use outside the traditional niches of this type of technology. We will first review the main advantages and disadvantages of these converters, then briefly describe a number of (modulator) architectures in use, and discuss some of the implementation imperfections one might expect, and finally we present the results of a survey of commercially available parts. (We emphasize again that although recent research [2] has resulted in, for example, a 12-bit device with 1-MHz bandwidth, here we are interested only in devices which are readily available in the market.)

Advantages and disadvantages of sigma-delta ADCs

The penalty paid for the high resolution achievable with sigma-delta technology has always been speed - the hardware has to operate at the oversampled rate, much larger than the maximum signal bandwidth, thus demanding great complexity of the digital circuitry. Because of this limitation, these converters have traditionally been relegated to high-resolution, very-low frequency applications (Figure 1), and more recently speech, audio and medium speeds (100 kHz to 1 MHz).

The digital filtering stage results in long latency between the start of the sampling cycle, and the first valid digital output; similarly, there is a significant lag thereafter between digital outputs and their corresponding sampling instants. This characteristics have prevented the use of these converters in multiplexed systems - it takes many clock cycles for the digital filter to settle after switching from one channel to the next.

By having thus outlined the key limitations of these devices, we've established the framework within which they are suitable, and may now proceed to itemize their numerous advantages when compared with alternate technologies:

• Most of the circuitry in sigma-delta converters is digital. This implies that performance will not drift significantly with time and temperature. Also, incorporation of the converter into a single-chip package with additional circuitry, such as a D/A converter (Codec), microcontroller, or DSP is feasible. Finally, the cost of implementation is low and will continue to decrease.

• They are inherently monotonic (i.e., a change in the digital output has always the same slope as the analog input). This is of particular importance in closed-loop control systems, where misinterpretation of the direction of change of a measured variable may cause the system to become unstable.

• They are inherently linear, and present little differential non-linearity.

• They do not require an external sample & hold circuit; due to the high input sampling rate and low precision of the A/D conversion, the devices are inherently self-sampling and tracking.

• Requirements for analog anti-aliasing filters are minimum - in most cases, a simple single pole RC-filter suffices. In contrast, the filters required for medium- to high-resolution applications using other (non-oversampling) technologies are very sophisticated, difficult to design, large, and expensive.

• The background noise level, which determines the SNR, is independent of the input signal level.

• Since there is a digital filtering stage after the A/D converter section, noise injected during the conversion process can be controlled very effectively. In fact, the filter may be tailored to minimize noise with very specific characteristics (e.g., 60 Hz).

• As stated above, their mostly digital nature makes these devices relatively inexpensive. In multichannel applications, a one-converter-per-channel architecture will often be more cost-effective than a single (very fast, non-oversampling) converter with multiplexed inputs.

The structure of the basic first-order sigma-delta converter is shown in Figure 2. The modulator consists of an integrator and a comparator, with a 1-bit DAC in a feedback loop. The digital decimator that follows performs both, digital filtering and down-sampling of the 1-bit input data stream.

Descriptions of the operation of this converter, both in time and frequency domains, abound in the literature (see for example [1], [2], [8]). The nonlinear nature of the devices makes precise analysis difficult, especially when higher order architectures are used; in fact, in many cases behaviour has only been possible to characterize through simulations. Here we limit ourselves to a brief discussion of common variations of the basic architecture, and implementation problems that might be expected.

Even the very simple first-order modulator can achieve very attractive SNRs; a good "rule of thumb" is that for every doubling of the oversampling ratio, the SNR will improve by approximately 9 dB [2]. In this architecture, imperfections in the integrator usually don't present significant difficulties, unless the oversampling ratio is extremely large. Similarly, constraints on the accuracy of integrator and DAC gains are quite lax - typically, the gain is implemented as a ratio of two capacitors, and the precision required in their matching is of only 1 part in 10. With regard to the quantizer, we observe that any noise introduced by nonlinearities is subject to noise shaping by the modulator, and has therefore little effect on SNR.

A significant problem with the basic first-order system, resulting directly from its nonlinear nature and feedback, is the presence of limit cycle oscillations. This will produce periodic or "tone" components in the output in response to DC inputs, or even small amplitude sinusoidal inputs. Clearly, these tones are highly undesirable in audio/speech applications; for this reason, even when the overall SNR may be very good, first-order modulators are practically never used in these areas.

Conceptually, the extension to a second-order modulator is quite straightforward. By incorporating a second integrator more quantization noise is "pushed" outside the passband. In this case, every doubling of the oversampling ratio results in a 15 dB increase in SNR.

With two integrators, we are now concerned with the accuracy of both their gains. Fortunately, it has been shown [2] that these are (relatively) insensitive to deviations from their nominal values over quite a wide range of oversampling ratios. The problem with limit cycles remains however, resulting in idle tones for DC or low amplitude sinusoidal inputs; also, unlike in the first-order case, the limit cycles are now dependent on the initial condition of the output. Furthermore, an additional potential problem with a second-order modulator that uses a single-bit quantizer, is that of "overloading"; this may produce harmonic distortion tones for sinusoidal inputs, as well as significant tone components near f_s/2.

In addition to further improving SNR, higher than second-order modulators will also alleviate some of the problems with idle tones. In general, for an N-order modulator every doubling of the oversampling ratio provides an additional (6N + 3) dB of SNR. A great variety of topologies have been implemented [1,2], and very often these are patented by the manufacturers. Clearly, the complexity of the circuitry increases dramatically, (conditional) stability is harder to achieve, and exact analysis is seldom possible.

Higher-order modulation can also be achieved by cascading several lower-order stages. This avoids problems with stability, while maintaining the advantages with respect to SNR and limit cycles. Fourth-order modulators consisting of the cascading of two second-order stages are common.

There are also architectures which employ multibit quantizers. For example, in a second-order modulator, each additional bit in the quantizer will results in a SNR improvement of about 6 dB. The stability of these systems is easier to predict (since a linearized model will more accurately represent the system), and idle tone problems are also alleviated. On the other hand, because of the linearity required for high-resolution converters, the multibit DAC is more difficult to fabricate.

Survey - commercially available devices

We concentrate on commercially available sigma-delta ADCs for general use in speech, audio and medium (100 kHz to 1 MHz) bandwidths. Codecs have been excluded; these devices, intended for very specific stereo sound applications, typically combine 16-bit A/D and D/A converters, and have become very popular (e.g., Analog Devices' AD1847, Crystal Semiconductors' CS4215, 16, 31, 48, Sony's CXD2555Q). We have striven to make sure the information, compiled from manufacturer's data sheets, data books, and application notes, is complete and accurate - we regret any omissions or mistakes. We also clarify that our citing of the devices in this section does not constitute any form of endorsement on our part.

Not unlike the situation with any other component, interpretation of the specifications of these devices requires some attention. There is unfortunately great inconsistency in the manner in which manufacturers present specifications for similar devices; in fact, sometimes this applies even in the case of parts made by the same manufacturer. The summary we present in Table 1 includes only key specifications and comments for each device; for complete information consult the data sheets. The devices are grouped by manufacturer, and these are shown in alphabetical order.

The following definitions apply to Table 1:
 

• Resolution: The number of different output codes possible. Expressed as N, where 2^N is the number of available output codes.

• BW: The (-3 dB) input signal bandwidth (f_B).

• OVSR: Oversampling ratio = f_s/2f_B, where f_s is the sampling frequency and f_B the input signal bandwidth.

• Dynamic Performance: Most manufacturers specify, amongst others, the SNR (ratio of the RMS value of the fundamental input signal to the RMS sum of all spectral components in the passband, expressed in decibels). In a few cases this is not specified, and we instead show the Dynamic Range (ratio of the largest allowable input signal to the noise floor, expressed in decibels). Notice that for the resolutions considered, the latter is typically a few decibels better than the former.

[2] P.M. Aziz, H.V. Sorensen and J. Van Der Spiegel, "An overview of sigma-delta converters," IEEE Signal Processing Magazine, Vol.13, No.1, Jan. 1996.

[3] F. Goodenough, "High-resolution ADCs up dynamic range in more applications," Electronic Design, Apr. 11, 1991.

[4] F. Goodenough, "20-bit delta-sigma ADCs vie for integrator jobs," Electronic Design, Apr. 25, 1991.

[5] J. Child, "High-resolution A-D converters sport new twists on old architectures," Computer Design, Nov. 1993.

[6] A. Agnello, "16-bit conversion paves the way to high-quality audio for PCs," Electronic Design, Jul. 26, 1990.

[7] A.W. Swager, "12-bit ADCs: now may be the time to upgrade your 8- and 10-bit systems," EDN, May 26, 1994.

[8] Analog Devices, "Sigma-delta conversion technology," DSPatch - Digital Signal Processing Applications Newsletter, Winter, 1990.
 

Reprinted with the Permission of EP&T (Electronic Products and Technology)
February 1996